SUSE Telco Cloud on AMD EPYC 9005 Series Processors #
Validated reference architecture
Telecom operators today face intensifying demands driven by 5G-Advanced and Open RAN deployments. These include stricter latency and jitter requirements, severe power and space constraints at the edge, and the growing need to integrate AI into network operations. SUSE® Telco Cloud running on AMD® EPYC™ 9005 Series Processors (code-named Turin) provides a robust, CPU-centric solution that addresses these challenges through high core density, strong memory performance, and flexible resource tuning capabilities. This reference architecture shows how the combination enables efficient workload consolidation for vRAN, 5G Core, and AI-augmented functions. It delivers the determinism, power efficiency, and operational simplicity operators need to scale intelligently and reduce complexity in their networks.
Documents published as part of the series SUSE Technical Reference Documentation have been contributed voluntarily by SUSE employees and third parties. They are meant to serve as examples of how particular actions can be performed. They have been compiled with utmost attention to detail. However, this does not guarantee complete accuracy. SUSE cannot verify that actions described in these documents do what is claimed or whether actions described have unintended consequences. SUSE LLC, its affiliates, the authors, and the translators may not be held liable for possible errors or the consequences thereof.
1 Introduction #
Telecom operators today face intensifying demands driven by 5G-Advanced and Open RAN deployments. These include stricter latency and jitter requirements, severe power and space constraints at the edge, and the growing need to integrate AI into network operations. SUSE® Telco Cloud running on AMD® EPYC™ 9005 Series Processors (code-named Turin) provides a robust, CPU-centric solution that addresses these challenges through high core density, strong memory performance, and flexible resource tuning capabilities.
This reference architecture shows how the combination enables efficient workload consolidation for vRAN, 5G Core, and AI-augmented functions. It delivers the determinism, power efficiency, and operational simplicity operators need to scale intelligently and reduce complexity in their networks.
1.1 Acknowledgments #
The following individuals contributed to the creation of this document:
Jivaji Ihare, Partner Solution Architect, SUSE
Terry Smith, Ecosystem Solution Innovation Director, SUSE
Vesselin Matev, Partner Solutions Manager, SUSE
Andrés Valero, Principal Technology Advocate, SUSE
2 Telco market challenges and requirements #
The rapid evolution toward 5G-Advanced and the large-scale deployment of Open RAN (O-RAN) have placed unprecedented computational demands on telecommunications infrastructure. Operators are moving away from traditional, hardware-centric designs toward fully software-defined architectures that must deliver significantly higher performance while operating under real-world constraints. This transition brings increased expectations around scalability, flexibility, and intelligence, but it also surfaces several critical technical challenges that general-purpose infrastructure must now overcome:
Stricter Latency and Jitter Limits: The move to O-RAN and Ultra-Reliable Low-Latency Communications (URLLC) has introduced much stricter requirements for latency and jitter, particularly within the O-RAN fronthaul and midhaul interfaces. Engineering teams must achieve the same level of deterministic precision and timing accuracy on general-purpose CPU architectures that was previously exclusive to specialized Application-Specific Integrated Circuits (ASICs).
Physical Edge Constraints with Power Efficiency: Expanding compute capacity at edge sites introduces severe physical bottlenecks, including restricted rack space, tight thermal envelopes, and limited power availability. Maximizing performance-per-watt and throughput-per-rack-unit is essential to scaling capacity without increasing physical footprints.
AI Integration at the Edge: Embedding AI directly into the network fabric, for real-time beamforming optimization, traffic steering, and automated fault detection, adds massive computational intensity. These advanced workloads require a combination of high core counts, wide memory bandwidth, and efficient data movement to ensure deterministic execution during complex inference tasks.
To address these needs, this reference architecture presents a validated integration of SUSE Telco Cloud on AMD EPYC 9005 Series Processors (code-named Turin). This software-defined blueprint combines the high core density and memory throughput of the AMD Turin architecture with SUSE’s robust cloud-native management. The result is a future-proof, x86-based foundation for vRAN, 5G Core, and AI-augmented network functions, providing the deterministic performance and extreme density required for next-generation intelligent networks.
3 The solution #
3.1 Hardware architecture: 5th gen AMD EPYC 9005 Series Processors #
The 5th Generation AMD EPYC 9005 Series Processors bring a modular chiplet design built around Zen 5 cores.
 Figure 1: AMD EPYC 9005 Series Processors with central I/O Die and 16 Zen 5 Classic-based Core Complex Dies # |  Figure 2: AMD EPYC 9005 Series Processors with central I/O Die and 12 Zen 5c “Dense”-based Core Complex Dies # |
Each Core Complex (CCX) groups up to eight Zen 5 cores that share a 32 MB L3 cache, delivering fast data access for threads working closely together.
 Figure 3: CCX with eight Zen5 compute cores and 32 MB shared L3 cache # |  Figure 4: CCX with sixteen Zen5c compute cores and 32 MB shared L3 cache # |
These CCXs reside on Core Complex Dies (CCDs), which connect through a central I/O Die using AMD Infinity Fabric. This architecture provides high core counts, substantial memory bandwidth via multiple DDR5 channels, and highly configurable Non-Uniform Memory Access (NUMA) topologies that telco operators can tune precisely to their workloads.
In dual-socket configurations, the platform delivers massive parallelism (up to 128 cores) while offering generous PCIe Gen5 lanes for high-speed networking cards and accelerators when needed. The design balances raw throughput with the predictable, low-jitter behavior essential for real-time telco applications. Features such as flexible NUMA Nodes Per Socket (NPS) settings and the option to treat individual L3 caches as NUMA domains give infrastructure teams fine-grained control over resource locality, memory interleaving, and thread pinning. This helps minimize cross-NUMA traffic that can introduce unwanted latency variation in packet processing or timing-critical functions.
For telecom operators, these capabilities translate into better workload consolidation and improved power efficiency per core. They also enable running both high-throughput data plane tasks and latency-sensitive control plane operations on the same general-purpose hardware. The architecture supports the industry shift toward CPU-centric designs that reduce dependency on specialized accelerators while still meeting strict performance service level objectives.
3.2 Software architecture: SUSE Telco Cloud #
SUSE Telco Cloud builds on SUSE Linux Micro, a lightweight, immutable operating system designed for edge and telco environments. It incorporates hardened real-time kernel capabilities, comprehensive automation for day-1 and day-2 operations, and full support for both virtual network functions (VNFs) and cloud-native network functions (CNFs). The platform integrates tightly with SUSE Rancher Prime for container orchestration and management, enabling GitOps-driven deployments that improve consistency and reduce human error across distributed sites.
Key telco-focused features include advanced observability tools, security hardening aligned with industry standards, and automated lifecycle management that simplifies patching and upgrades without disrupting live services. SUSE Telco Cloud also provides optimized networking stacks with DPDK support, SR-IOV capabilities, and precise CPU isolation mechanisms that work hand-in-hand with the underlying hardware’s NUMA and cache architecture.
Together, the stack lets telco operators run consolidated workloads on general-purpose hardware while maintaining the isolation, determinism, and performance guarantees traditionally associated with specialized appliances. This carrier-grade foundation helps service providers accelerate innovation, lower total cost of ownership, and build infrastructure that can evolve smoothly toward 6G and greater AI integration in the network.
4 Deployment and tuning for deterministic low latency #
See the Section 7, “Testing setup and results” for the Validation and performance testing using Cyclictest.
The Validation and performance testing focused heavily on ensuring real-time consistency using cyclictest under heavy execution load. During evaluation, a rigorous set of low-latency best practices were applied to the platform:
SUSE Telco Cloud on AMD EPYC 9005 Series Processors
Core and thread topology: Simultaneous Multithreading (SMT) was disabled, and housekeeping operating system cores were isolated exclusively to the first CCX (cores 0–7).
Kernel optimization: A real-time kernel was deployed using standard
isolcpus,nohz_full, andrcu_nocbsboot parameters.NUMA configuration: Testing ran explicitly without forcing
numa=off, allowing the underlying hardware NUMA capabilities to operate optimally.
A primary area of exploration involved testing the various NUMA Nodes Per Socket (NPS) BIOS configurations to evaluate workload behavior across different granularities:
| NPS Setting | Configuration Profile | Ideal Workload Target |
|---|---|---|
NPS4 | Four NUMA domains per socket. | Provides the tightest hardware locality between cores, memory, and local I/O adapters. |
NPS2 | Two NUMA domains per socket. | Offers a balanced domain split ideal for many common virtual network functions. |
NPS1 | Single NUMA node per socket. | Enables full memory interleaving across the entire socket channel space. |
NPS0 | System-wide single NUMA domain (Dual-socket only). | Simplifies resource allocation for less NUMA-aware workloads. |
Validation performance note: Across all tested configurations, the platform demonstrated strong, deterministic real-time behavior. Maximum latencies consistently remained in the low teens to upper single-digit microseconds under representative network traffic loads.
5 Practical benefits for telco operators #
This combination supports the shift toward CPU-only architectures. By removing reliance on discrete accelerators for many use cases, operators can simplify supply chains, reduce validation cycles, and lower both CAPEX and OPEX. The high core density and memory subsystem efficiency help maximize workload consolidation per site while keeping power and cooling demands manageable. The platform also aligns well with AI-native telco roadmaps. Strong per-core performance and cache hierarchies support both traditional packet processing and emerging inference tasks running alongside RAN or core functions.
6 Looking ahead #
The successful validation of SUSE Telco Cloud on AMD EPYC 9005 Series Processors gives telco operators another proven path for building efficient, future-ready networks. Whether the priority is maximum density at the edge, deterministic performance for Open RAN, or a balanced platform ready for AI services, the joint solution offers the configurability and performance needed. The telecommunications sector is changing rapidly. Platforms that combine raw processing capability with operational simplicity and open standards will separate industry leaders from the rest. SUSE and AMD deliver precisely that foundation.
If you are currently evaluating next-generation telecom infrastructure, reach out to the SUSE and AMD account teams to initiate a technical proof of concept tailored to your specific deployment environment.
7 Testing setup and results #
For the testing setup, BIOS and kernel are configured as follows to provide the best possible performance:
BIOS
Disable SMT/Logical Processors
Disable all the C-state and P-state (maximum frequency requested) optimizations
Disable all the L1/L2 related Prefetchers
Look for maximum performance at the cost of energy savings
Kernel
120 isolated cores in total after setting the first 8 cores (for example, first CCD) as housekeeping cores (following AMD recommendations)
Remove unnecessary (kernel) threads and interrupts from isolated cores (see SUSE Telco Cloud documentation: Kernel arguments for low latency and high performance)
Except for a single core in a single test case, all maximum latencies per each isolated core returned below 20 µsec (the target identified by AMD experts). Cyclictest testing was repeated for all possible NUMA configurations without experiencing any significant difference.
7.1 Dell PowerEdge R7725 - dual-socket AMD Turin (EPYC 9555 - 64 “Zen5” cores per socket) #
AMD EPYC 5th Generation - Architecture Overview Sources:
This testing used AMD EPYC 9555 64-cores Zen5 processors with 8 Zen5 cores per CCX.
The “AMD EPYC 9555 64-cores Zen5” processor used in this test, provides 8 CCDs per socket (eight Zen5 cores each with a 32MB shared L3) instead of the 12 CCDs per socket.
This testing was performed with a dual-socket Dell PowerEdge R7725 server using “AMD EPYC 9555 64-cores Zen5” processors, each with 8 CCDs per socket. This delivered 16 NUMA nodes in total when enabling the “L3 cache as NUMA domain” BIOS option.
The “AMD EPYC 9555 64-cores Zen5” processors used in this test provide 2 CCDs per NUMA quadrant in an NPS=4 configuration (8 CCDs per socket) instead of the 4 CCDs per quadrant (16 CCDs per socket) shown in this image.
7.2 BIOS settings #
You can find the applied BIOS configuration in Section 7.7, “Appendix - BIOS settings”.
7.3 General OS settings #
House Keeping cores set to 0-7 as recommended from AMD (for example, all cores in the first CCX); resulting isolated cores: 8-127 (120 isolated cores in total)
Remove unnecessary (kernel) threads and interrupts from isolated cores; see SUSE Telco Cloud documentation: Kernel arguments for low latency and high performance.
numa=off (used during the early tests) has been removed from the set of kernel args.
RPMs related to Telco features in SUSE Telco Cloud downstream nodes that are not required for the cyclictest based performance tests have not been installed (for example, linuxptp).
7.4 General Kubernetes/RKE2 settings #
As the Kubernetes/RKE2 layer is not required for cyclictest based performance tests, it has not been deployed in the target server.
7.5 Results #
For each test configuration we have run the test several times, showing below the obtained “Max Latencies” (per isolated core with 120 isolated cores in total) for two of them, selected randomly.
7.5.1 BIOS/L3 cache as NUMA Domain=disabled - BIOS/NPS=0 HK cores=0-7 #
numactl -Havailable: 1 nodes (0) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 node 0 size: 385960 MB node 0 free: 320383 MB node distances: node 0 0: 10
cd ~/telco-performance/Performance-settings/rt-low-latency-tools && \
../Performance\ scripts/performance-settings.sh && \
./release-scenario-SV-rtapp95utilIsolate-cyclictestIsolated.sh# Max Latencies: 00012 00002 00014 00003 00008 00003 00003 00013 00003 00003 00003 00002 00003 00011 00011 00016 00004 00004 00004 00003 00008 00003 00011 00016 00014 00014 00014 00008 00006 00013 00002 00014 00003 00003 00003 00002 00015 00009 00015 00003 00007 00007 00007 00002 00011 00011 00011 00002 00008 00008 00008 00002 00002 00009 00007 00002 00016 00002 00002 00002 00002 00002 00016 00015 00003 00003 00011 00002 00009 00005 00011 00011 00017 00017 00017 00012 00002 00003 00016 00007 00004 00004 00004 00004 00002 00008 00003 00008 00003 00003 00003 00003 00003 00018 00006 00002 00002 00014 00002 00002 00012 00002 00003 00002 00003 00003 00003 00002 00002 00002 00002 00002 00015 00015 00015 00002 00013 00004 00002 00002 # Max Latencies: 00004 00013 00010 00002 00002 00013 00010 00015 00002 00002 00002 00004 00002 00016 00010 00002 00002 00002 00002 00001 00002 00002 00001 00002 00004 00004 00001 00001 00001 00002 00002 00002 00015 00009 00016 00004 00002 00015 00011 00007 00002 00002 00002 00001 00007 00002 00015 00007 00009 00009 00009 00006 00002 00002 00002 00002 00002 00002 00002 00001 00003 00002 00002 00002 00004 00004 00003 00008 00002 00001 00001 00001 00003 00003 00002 00002 00001 00001 00007 00002 00016 00016 00016 00011 00002 00002 00002 00011 00003 00003 00003 00002 00007 00003 00002 00002 00003 00002 00011 00003 00012 00001 00002 00002 00008 00008 00008 00002 00002 00015 00005 00013 00014 00014 00002 00002 00003 00002 00002 00010
7.5.2 BIOS/L3 cache as NUMA Domain=disabled - BIOS/NPS=1 HK cores=0-7 #
# numactl -Havailable: 4 nodes (0-3) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 node 0 size: 95978 MB node 0 free: 63638 MB node 1 cpus: 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 node 1 size: 96736 MB node 1 free: 85365 MB node 2 cpus: 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 node 2 size: 96752 MB node 2 free: 85441 MB node 3 cpus: 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 node 3 size: 96685 MB node 3 free: 84828 MB node distances: node 0 1 2 3 0: 10 12 32 32 1: 12 10 32 32 2: 32 32 10 12 3: 32 32 12 10
# cd ~/telco-performance/Performance-settings/rt-low-latency-tools && \
../Performance\ scripts/performance-settings.sh && \
./release-scenario-SV-rtapp95utilIsolate-cyclictestIsolated.sh# Max Latencies: 00005 00002 00003 00002 00004 00002 00002 00014 00003 00003 00003 00002 00002 00003 00003 00003 00003 00003 00002 00003 00002 00014 00004 00003 00003 00003 00003 00003 00002 00002 00003 00002 00007 00007 00007 00004 00003 00005 00003 00003 00003 00003 00003 00003 00003 00003 00002 00016 00002 00002 00003 00003 00003 00002 00002 00013 00002 00002 00003 00003 00002 00003 00010 00009 00003 00002 00002 00013 00002 00002 00002 00014 00008 00008 00004 00004 00003 00002 00015 00017 00003 00002 00002 00002 00002 00002 00003 00003 00016 00016 00016 00016 00016 00015 00002 00009 00004 00004 00003 00003 00004 00015 00002 00002 00003 00003 00003 00002 00003 00015 00003 00004 00016 00011 00004 00003 00002 00003 00002 00016 # Max Latencies: 00016 00004 00012 00004 00003 00012 00005 00005 00004 00005 00013 00010 00005 00004 00004 00010 00014 00014 00009 00004 00015 00007 00007 00004 00004 00004 00004 00014 00006 00004 00012 00005 00005 00005 00004 00004 00004 00004 00016 00005 00004 00003 00006 00004 00012 00003 00004 00009 00011 00011 00011 00004 00004 00004 00009 00015 00015 00015 00017 00007 00009 00005 00006 00006 00010 00010 00010 00010 00005 00010 00006 00004 00009 00005 00003 00004 00004 00006 00004 00004 00013 00013 00013 00011 00004 00005 00004 00004 00009 00007 00004 00005 00004 00012 00005 00007 00013 00013 00013 00011 00013 00008 00004 00004 00007 00007 00004 00004 00004 00004 00004 00004 00009 00005 00005 00004 00003 00004 00004 00005
7.5.3 BIOS/L3 cache as NUMA Domain=disabled - BIOS/NPS=2 HK cores=0-7 #
# numactl -Havailable: 4 nodes (0-3) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 node 0 size: 95978 MB node 0 free: 63638 MB node 1 cpus: 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 node 1 size: 96736 MB node 1 free: 85365 MB node 2 cpus: 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 node 2 size: 96752 MB node 2 free: 85441 MB node 3 cpus: 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 node 3 size: 96685 MB node 3 free: 84828 MB node distances: node 0 1 2 3 0: 10 12 32 32 1: 12 10 32 32 2: 32 32 10 12 3: 32 32 12 10
# cd ~/telco-performance/Performance-settings/rt-low-latency-tools && \
../Performance\ scripts/performance-settings.sh && \
./release-scenario-SV-rtapp95utilIsolate-cyclictestIsolated.sh# Max Latencies: 00005 00002 00003 00002 00004 00002 00002 00014 00003 00003 00003 00002 00002 00003 00003 00003 00003 00003 00002 00003 00002 00014 00004 00003 00003 00003 00003 00003 00002 00002 00003 00002 00007 00007 00007 00004 00003 00005 00003 00003 00003 00003 00003 00003 00003 00003 00002 00016 00002 00002 00003 00003 00003 00002 00002 00013 00002 00002 00003 00003 00002 00003 00010 00009 00003 00002 00002 00013 00002 00002 00002 00014 00008 00008 00004 00004 00003 00002 00015 00017 00003 00002 00002 00002 00002 00002 00003 00003 00016 00016 00016 00016 00016 00015 00002 00009 00004 00004 00003 00003 00004 00015 00002 00002 00003 00003 00003 00002 00003 00015 00003 00004 00016 00011 00004 00003 00002 00003 00002 00016 # Max Latencies: 00016 00004 00012 00004 00003 00012 00005 00005 00004 00005 00013 00010 00005 00004 00004 00010 00014 00014 00009 00004 00015 00007 00007 00004 00004 00004 00004 00014 00006 00004 00012 00005 00005 00005 00004 00004 00004 00004 00016 00005 00004 00003 00006 00004 00012 00003 00004 00009 00011 00011 00011 00004 00004 00004 00009 00015 00015 00015 00017 00007 00009 00005 00006 00006 00010 00010 00010 00010 00005 00010 00006 00004 00009 00005 00003 00004 00004 00006 00004 00004 00013 00013 00013 00011 00004 00005 00004 00004 00009 00007 00004 00005 00004 00012 00005 00007 00013 00013 00013 00011 00013 00008 00004 00004 00007 00007 00004 00004 00004 00004 00004 00004 00009 00005 00005 00004 00003 00004 00004 00005
7.5.4 BIOS/L3 cache as NUMA Domain=disabled - BIOS/NPS=4 HK cores=0-7 #
# numactl -Havailable: 8 nodes (0-7) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 node 0 size: 47602 MB node 0 free: 21140 MB node 1 cpus: 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 node 1 size: 48375 MB node 1 free: 42456 MB node 2 cpus: 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 node 2 size: 48375 MB node 2 free: 42772 MB node 3 cpus: 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 node 3 size: 48359 MB node 3 free: 42723 MB node 4 cpus: 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 node 4 size: 48375 MB node 4 free: 42774 MB node 5 cpus: 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 node 5 size: 48375 MB node 5 free: 42767 MB node 6 cpus: 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 node 6 size: 48375 MB node 6 free: 42781 MB node 7 cpus: 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 node 7 size: 48308 MB node 7 free: 42282 MB node distances: node 0 1 2 3 4 5 6 7 0: 10 12 12 12 32 32 32 32 1: 12 10 12 12 32 32 32 32 2: 12 12 10 12 32 32 32 32 3: 12 12 12 10 32 32 32 32 4: 32 32 32 32 10 12 12 12 5: 32 32 32 32 12 10 12 12 6: 32 32 32 32 12 12 10 12 7: 32 32 32 32 12 12 12 10
# cd ~/telco-performance/Performance-settings/rt-low-latency-tools && \
../Performance\ scripts/performance-settings.sh && \
./release-scenario-SV-rtapp95utilIsolate-cyclictestIsolated.sh# Max Latencies: 00004 00004 00012 00008 00017 00007 00003 00003 00009 00009 00009 00009 00003 00003 00003 00003 00004 00004 00004 00004 00003 00003 00003 00003 00015 00015 00015 00015 00008 00003 00003 00003 00005 00005 00004 00005 00003 00003 00005 00003 00012 00012 00012 00012 00009 00005 00015 00015 00013 00013 00013 00013 00007 00005 00006 00004 00004 00003 00004 00004 00004 00003 00003 00009 00004 00004 00004 00003 00003 00003 00003 00003 00005 00005 00014 00005 00005 00005 00005 00004 00012 00012 00012 00017 00006 00004 00013 00008 00013 00004 00003 00003 00004 00013 00007 00003 00004 00003 00011 00009 00003 00003 00014 00003 00006 00005 00005 00007 00004 00013 00003 00014 00007 00007 00016 00014 00009 00003 00005 00004 # Max Latencies: 00005 00003 00012 00003 00003 00003 00003 00002 00013 00013 00013 00013 00015 00006 00002 00002 00006 00006 00017 00009 00002 00002 00002 00013 00002 00002 00001 00001 00001 00001 00001 00001 00002 00002 00002 00001 00001 00001 00001 00001 00011 00011 00011 00001 00002 00001 00001 00001 00002 00002 00002 00001 00008 00005 00003 00003 00010 00010 00010 00009 00017 00017 00016 00017 00016 00016 00016 00013 00008 00008 00002 00002 00003 00003 00003 00003 00002 00002 00002 00002 00003 00003 00003 00009 00002 00003 00002 00002 00018 00018 00018 00004 00002 00003 00002 00002 00004 00002 00002 00002 00002 00002 00002 00002 00017 00006 00015 00002 00007 00002 00002 00003 00004 00003 00009 00006 00002 00011 00007 00002
7.6 BIOS/L3 cache as NUMA Domain=enabled HK cores=0-7 #
# numactl -Havailable: 16 nodes (0-15) node 0 cpus: 0 1 2 3 4 5 6 7 node 0 size: 23415 MB node 0 free: 19369 MB node 1 cpus: 8 9 10 11 12 13 14 15 node 1 size: 24188 MB node 1 free: 20873 MB node 2 cpus: 16 17 18 19 20 21 22 23 node 2 size: 24188 MB node 2 free: 20525 MB node 3 cpus: 24 25 26 27 28 29 30 31 node 3 size: 24188 MB node 3 free: 20872 MB node 4 cpus: 32 33 34 35 36 37 38 39 node 4 size: 24188 MB node 4 free: 20874 MB node 5 cpus: 40 41 42 43 44 45 46 47 node 5 size: 24188 MB node 5 free: 20874 MB node 6 cpus: 48 49 50 51 52 53 54 55 node 6 size: 24188 MB node 6 free: 20835 MB node 7 cpus: 56 57 58 59 60 61 62 63 node 7 size: 24188 MB node 7 free: 20895 MB node 8 cpus: 64 65 66 67 68 69 70 71 node 8 size: 24188 MB node 8 free: 21966 MB node 9 cpus: 72 73 74 75 76 77 78 79 node 9 size: 24188 MB node 9 free: 21968 MB node 10 cpus: 80 81 82 83 84 85 86 87 node 10 size: 24188 MB node 10 free: 21972 MB node 11 cpus: 88 89 90 91 92 93 94 95 node 11 size: 24188 MB node 11 free: 21970 MB node 12 cpus: 96 97 98 99 100 101 102 103 node 12 size: 24188 MB node 12 free: 21968 MB node 13 cpus: 104 105 106 107 108 109 110 111 node 13 size: 24089 MB node 13 free: 21873 MB node 14 cpus: 112 113 114 115 116 117 118 119 node 14 size: 24188 MB node 14 free: 21567 MB node 15 cpus: 120 121 122 123 124 125 126 127 node 15 size: 24188 MB node 15 free: 21967 MB node distances: node 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0: 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 1: 11 10 11 11 11 11 11 11 11 11 11 11 11 11 11 11 2: 11 11 10 11 11 11 11 11 11 11 11 11 11 11 11 11 3: 11 11 11 10 11 11 11 11 11 11 11 11 11 11 11 11 4: 11 11 11 11 10 11 11 11 11 11 11 11 11 11 11 11 5: 11 11 11 11 11 10 11 11 11 11 11 11 11 11 11 11 6: 11 11 11 11 11 11 10 11 11 11 11 11 11 11 11 11 7: 11 11 11 11 11 11 11 10 11 11 11 11 11 11 11 11 8: 11 11 11 11 11 11 11 11 10 11 11 11 11 11 11 11 9: 11 11 11 11 11 11 11 11 11 10 11 11 11 11 11 11 10: 11 11 11 11 11 11 11 11 11 11 10 11 11 11 11 11 11: 11 11 11 11 11 11 11 11 11 11 11 10 11 11 11 11 12: 11 11 11 11 11 11 11 11 11 11 11 11 10 11 11 11 13: 11 11 11 11 11 11 11 11 11 11 11 11 11 10 11 11 14: 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10 11 15: 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 10
# cd ~/telco-performance/Performance-settings/rt-low-latency-tools && \
../Performance\ scripts/performance-settings.sh && \
./release-scenario-SV-rtapp95utilIsolate-cyclictestIsolated.sh# Max Latencies: 00017 00002 00002 00008 00015 00003 00014 00003 00005 00005 00005 00005 00005 00018 00017 00007 00012 00012 00005 00005 00002 00008 00003 00003 00009 00009 00009 00008 00005 00016 00002 00002 00007 00007 00007 00007 00007 00011 00009 00002 00003 00003 00003 00002 00002 00014 00005 00002 00009 00009 00009 00009 00006 00003 00010 00012 00019 00019 00018 00018 00010 00003 00002 00015 00004 00010 00003 00004 00015 00003 00003 00010 00017 00017 00015 00017 00017 00013 00012 00013 00002 00002 00002 00002 00002 00003 00016 00011 00003 00003 00003 00003 00002 00002 00010 00003 00002 00006 00006 00006 00006 00002 00005 00017 00007 00007 00007 00007 00015 00012 00003 00015 00003 00003 00003 00003 00003 00017 00003 00003 # Max Latencies: 00009 00005 00007 00005 00010 00010 00004 00006 00012 00012 00008 00006 00015 00013 00007 00014 00011 00011 00011 00007 00009 00006 00013 00004 00006 00006 00006 00006 00005 00014 00013 00012 00005 00005 00017 00011 00005 00006 00015 00004 00008 00008 00006 00012 00005 00011 00008 00005 00017 00017 00017 00008 00011 00007 00017 00007 00015 00015 00015 00005 00008 00006 00004 00004 00008 00008 00008 00011 00004 00004 00004 00004 00005 00005 00005 00019 00006 00013 00015 00013 00012 00012 00012 00013 00007 00004 00004 00006 00008 00008 00008 00006 00011 00005 00014 00015 00017 00017 00017 00012 00005 00014 00014 00005 00013 00013 00013 00008 00006 00005 00007 00005 00007 00008 00007 00005 00005 00004 00006 0000
# numactl -Havailable: 16 nodes (0-15) node 0 cpus: 0 1 2 3 4 5 6 7 node 0 size: 23415 MB node 0 free: 19425 MB node 1 cpus: 8 9 10 11 12 13 14 15 node 1 size: 24188 MB node 1 free: 20887 MB node 2 cpus: 16 17 18 19 20 21 22 23 node 2 size: 24188 MB node 2 free: 20540 MB node 3 cpus: 24 25 26 27 28 29 30 31 node 3 size: 24188 MB node 3 free: 20886 MB node 4 cpus: 32 33 34 35 36 37 38 39 node 4 size: 24188 MB node 4 free: 20892 MB node 5 cpus: 40 41 42 43 44 45 46 47 node 5 size: 24164 MB node 5 free: 20864 MB node 6 cpus: 48 49 50 51 52 53 54 55 node 6 size: 24188 MB node 6 free: 20845 MB node 7 cpus: 56 57 58 59 60 61 62 63 node 7 size: 24188 MB node 7 free: 20898 MB node 8 cpus: 64 65 66 67 68 69 70 71 node 8 size: 24188 MB node 8 free: 21914 MB node 9 cpus: 72 73 74 75 76 77 78 79 node 9 size: 24188 MB node 9 free: 21912 MB node 10 cpus: 80 81 82 83 84 85 86 87 node 10 size: 24188 MB node 10 free: 21916 MB node 11 cpus: 88 89 90 91 92 93 94 95 node 11 size: 24188 MB node 11 free: 21911 MB node 12 cpus: 96 97 98 99 100 101 102 103 node 12 size: 24188 MB node 12 free: 21914 MB node 13 cpus: 104 105 106 107 108 109 110 111 node 13 size: 24113 MB node 13 free: 21835 MB node 14 cpus: 112 113 114 115 116 117 118 119 node 14 size: 24188 MB node 14 free: 21575 MB node 15 cpus: 120 121 122 123 124 125 126 127 node 15 size: 24188 MB node 15 free: 21915 MB node distances: node 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0: 10 11 11 11 11 11 11 11 32 32 32 32 32 32 32 32 1: 11 10 11 11 11 11 11 11 32 32 32 32 32 32 32 32 2: 11 11 10 11 11 11 11 11 32 32 32 32 32 32 32 32 3: 11 11 11 10 11 11 11 11 32 32 32 32 32 32 32 32 4: 11 11 11 11 10 11 11 11 32 32 32 32 32 32 32 32 5: 11 11 11 11 11 10 11 11 32 32 32 32 32 32 32 32 6: 11 11 11 11 11 11 10 11 32 32 32 32 32 32 32 32 7: 11 11 11 11 11 11 11 10 32 32 32 32 32 32 32 32 8: 32 32 32 32 32 32 32 32 10 11 11 11 11 11 11 11 9: 32 32 32 32 32 32 32 32 11 10 11 11 11 11 11 11 10: 32 32 32 32 32 32 32 32 11 11 10 11 11 11 11 11 11: 32 32 32 32 32 32 32 32 11 11 11 10 11 11 11 11 12: 32 32 32 32 32 32 32 32 11 11 11 11 10 11 11 11 13: 32 32 32 32 32 32 32 32 11 11 11 11 11 10 11 11 14: 32 32 32 32 32 32 32 32 11 11 11 11 11 11 10 11 15: 32 32 32 32 32 32 32 32 11 11 11 11 11 11 11 10
# cd ~/telco-performance/Performance-settings/rt-low-latency-tools && \
../Performance\ scripts/performance-settings.sh && \
./release-scenario-SV-rtapp95utilIsolate-cyclictestIsolated.sh# Max Latencies: 00003 00014 00004 00003 00002 00002 00012 00002 00003 00003 00003 00003 00002 00003 00003 00002 00004 00004 00004 00002 00002 00007 00003 00003 00006 00006 00006 00018 00006 00003 00002 00003 00002 00002 00002 00002 00002 00002 00002 00005 00003 00003 00002 00005 00002 00002 00003 00047 00002 00002 00002 00002 00008 00002 00002 00003 00003 00003 00003 00014 00010 00018 00014 00003 00005 00009 00009 00003 00003 00005 00003 00006 00003 00003 00003 00002 00002 00012 00003 00002 00014 00002 00003 00003 00003 00004 00003 00003 00018 00018 00018 00018 00018 00006 00002 00002 00003 00003 00003 00003 00002 00002 00003 00003 00010 00010 00010 00010 00002 00004 00003 00003 00002 00002 00002 00005 00002 00002 00002 00003 # Max Latencies: 00003 00002 00011 00002 00003 00002 00002 00002 00002 00002 00002 00013 00005 00001 00002 00002 00002 00002 00002 00001 00001 00001 00001 00001 00002 00002 00002 00002 00017 00011 00004 00001 00002 00002 00003 00002 00002 00014 00004 00008 00003 00003 00001 00001 00001 00001 00001 00015 00002 00012 00009 00002 00018 00010 00002 00002 00004 00003 00003 00003 00009 00008 00003 00002 00014 00008 00003 00004 00002 00002 00002 00002 00013 00013 00013 00013 00008 00002 00002 00002 00003 00003 00003 00003 00002 00011 00010 00014 00002 00002 00003 00002 00002 00002 00002 00002 00009 00009 00009 00002 00002 00002 00002 00002 00009 00009 00008 00006 00002 00002 00002 00002 00003 00002 00002 00003 00009 00009 00002 00002
# numactl -Havailable: 16 nodes (0-15) node 0 cpus: 0 1 2 3 4 5 6 7 node 0 size: 23415 MB node 0 free: 19428 MB node 1 cpus: 8 9 10 11 12 13 14 15 node 1 size: 24188 MB node 1 free: 20885 MB node 2 cpus: 16 17 18 19 20 21 22 23 node 2 size: 24188 MB node 2 free: 20541 MB node 3 cpus: 24 25 26 27 28 29 30 31 node 3 size: 24184 MB node 3 free: 20877 MB node 4 cpus: 32 33 34 35 36 37 38 39 node 4 size: 24188 MB node 4 free: 20883 MB node 5 cpus: 40 41 42 43 44 45 46 47 node 5 size: 24168 MB node 5 free: 20861 MB node 6 cpus: 48 49 50 51 52 53 54 55 node 6 size: 24188 MB node 6 free: 20845 MB node 7 cpus: 56 57 58 59 60 61 62 63 node 7 size: 24188 MB node 7 free: 20890 MB node 8 cpus: 64 65 66 67 68 69 70 71 node 8 size: 24188 MB node 8 free: 21909 MB node 9 cpus: 72 73 74 75 76 77 78 79 node 9 size: 24188 MB node 9 free: 21904 MB node 10 cpus: 80 81 82 83 84 85 86 87 node 10 size: 24188 MB node 10 free: 21909 MB node 11 cpus: 88 89 90 91 92 93 94 95 node 11 size: 24184 MB node 11 free: 21917 MB node 12 cpus: 96 97 98 99 100 101 102 103 node 12 size: 24188 MB node 12 free: 21912 MB node 13 cpus: 104 105 106 107 108 109 110 111 node 13 size: 24117 MB node 13 free: 21837 MB node 14 cpus: 112 113 114 115 116 117 118 119 node 14 size: 24188 MB node 14 free: 21561 MB node 15 cpus: 120 121 122 123 124 125 126 127 node 15 size: 24188 MB node 15 free: 21904 MB node distances: node 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0: 10 11 11 11 12 12 12 12 32 32 32 32 32 32 32 32 1: 11 10 11 11 12 12 12 12 32 32 32 32 32 32 32 32 2: 11 11 10 11 12 12 12 12 32 32 32 32 32 32 32 32 3: 11 11 11 10 12 12 12 12 32 32 32 32 32 32 32 32 4: 12 12 12 12 10 11 11 11 32 32 32 32 32 32 32 32 5: 12 12 12 12 11 10 11 11 32 32 32 32 32 32 32 32 6: 12 12 12 12 11 11 10 11 32 32 32 32 32 32 32 32 7: 12 12 12 12 11 11 11 10 32 32 32 32 32 32 32 32 8: 32 32 32 32 32 32 32 32 10 11 11 11 12 12 12 12 9: 32 32 32 32 32 32 32 32 11 10 11 11 12 12 12 12 10: 32 32 32 32 32 32 32 32 11 11 10 11 12 12 12 12 11: 32 32 32 32 32 32 32 32 11 11 11 10 12 12 12 12 12: 32 32 32 32 32 32 32 32 12 12 12 12 10 11 11 11 13: 32 32 32 32 32 32 32 32 12 12 12 12 11 10 11 11 14: 32 32 32 32 32 32 32 32 12 12 12 12 11 11 10 11 15: 32 32 32 32 32 32 32 32 12 12 12 12 11 11 11 10
# cd ~/telco-performance/Performance-settings/rt-low-latency-tools && \
../Performance\ scripts/performance-settings.sh && \
./release-scenario-SV-rtapp95utilIsolate-cyclictestIsolated.sh# Max Latencies: 00006 00012 00004 00012 00014 00006 00005 00004 00007 00007 00007 00006 00012 00011 00004 00004 00006 00004 00009 00015 00005 00005 00004 00004 00018 00018 00018 00019 00014 00006 00012 00006 00017 00012 00017 00008 00006 00004 00005 00017 00004 00016 00006 00005 00005 00005 00004 00004 00004 00004 00011 00004 00004 00005 00004 00004 00013 00013 00013 00013 00012 00005 00007 00017 00010 00012 00012 00006 00006 00012 00006 00006 00006 00013 00007 00007 00007 00012 00013 00006 00017 00017 00017 00017 00017 00009 00007 00017 00012 00012 00012 00012 00010 00004 00008 00005 00006 00006 00006 00008 00006 00006 00007 00007 00016 00016 00006 00004 00004 00004 00004 00012 00005 00005 00012 00004 00004 00004 00004 00004 # Max Latencies: 00005 00009 00002 00003 00015 00006 00017 00009 00017 00017 00017 00006 00001 00001 00001 00001 00002 00002 00002 00001 00001 00002 00001 00005 00015 00015 00015 00017 00007 00003 00002 00002 00003 00003 00003 00004 00003 00003 00002 00002 00002 00002 00002 00002 00014 00004 00001 00002 00002 00002 00002 00003 00014 00003 00002 00002 00003 00003 00003 00003 00003 00002 00002 00002 00002 00002 00003 00003 00002 00008 00015 00012 00004 00004 00004 00004 00002 00002 00002 00002 00003 00003 00003 00003 00003 00018 00008 00003 00010 00010 00010 00010 00005 00002 00002 00003 00015 00015 00019 00015 00017 00003 00002 00002 00002 00003 00002 00002 00003 00002 00002 00002 00009 00017 00014 00002 00011 00002 00002 00002
# numactl -Havailable: 16 nodes (0-15) node 0 cpus: 0 1 2 3 4 5 6 7 node 0 size: 23415 MB node 0 free: 19375 MB node 1 cpus: 8 9 10 11 12 13 14 15 node 1 size: 24186 MB node 1 free: 20878 MB node 2 cpus: 16 17 18 19 20 21 22 23 node 2 size: 24188 MB node 2 free: 20533 MB node 3 cpus: 24 25 26 27 28 29 30 31 node 3 size: 24186 MB node 3 free: 20874 MB node 4 cpus: 32 33 34 35 36 37 38 39 node 4 size: 24188 MB node 4 free: 20879 MB node 5 cpus: 40 41 42 43 44 45 46 47 node 5 size: 24186 MB node 5 free: 20879 MB node 6 cpus: 48 49 50 51 52 53 54 55 node 6 size: 24188 MB node 6 free: 20842 MB node 7 cpus: 56 57 58 59 60 61 62 63 node 7 size: 24170 MB node 7 free: 20865 MB node 8 cpus: 64 65 66 67 68 69 70 71 node 8 size: 24188 MB node 8 free: 21909 MB node 9 cpus: 72 73 74 75 76 77 78 79 node 9 size: 24186 MB node 9 free: 21901 MB node 10 cpus: 80 81 82 83 84 85 86 87 node 10 size: 24188 MB node 10 free: 21910 MB node 11 cpus: 88 89 90 91 92 93 94 95 node 11 size: 24186 MB node 11 free: 21901 MB node 12 cpus: 96 97 98 99 100 101 102 103 node 12 size: 24188 MB node 12 free: 21911 MB node 13 cpus: 104 105 106 107 108 109 110 111 node 13 size: 24186 MB node 13 free: 21911 MB node 14 cpus: 112 113 114 115 116 117 118 119 node 14 size: 24188 MB node 14 free: 21574 MB node 15 cpus: 120 121 122 123 124 125 126 127 node 15 size: 24119 MB node 15 free: 21824 MB node distances: node 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0: 10 11 12 12 12 12 12 12 32 32 32 32 32 32 32 32 1: 11 10 12 12 12 12 12 12 32 32 32 32 32 32 32 32 2: 12 12 10 11 12 12 12 12 32 32 32 32 32 32 32 32 3: 12 12 11 10 12 12 12 12 32 32 32 32 32 32 32 32 4: 12 12 12 12 10 11 12 12 32 32 32 32 32 32 32 32 5: 12 12 12 12 11 10 12 12 32 32 32 32 32 32 32 32 6: 12 12 12 12 12 12 10 11 32 32 32 32 32 32 32 32 7: 12 12 12 12 12 12 11 10 32 32 32 32 32 32 32 32 8: 32 32 32 32 32 32 32 32 10 11 12 12 12 12 12 12 9: 32 32 32 32 32 32 32 32 11 10 12 12 12 12 12 12 10: 32 32 32 32 32 32 32 32 12 12 10 11 12 12 12 12 11: 32 32 32 32 32 32 32 32 12 12 11 10 12 12 12 12 12: 32 32 32 32 32 32 32 32 12 12 12 12 10 11 12 12 13: 32 32 32 32 32 32 32 32 12 12 12 12 11 10 12 12 14: 32 32 32 32 32 32 32 32 12 12 12 12 12 12 10 11 15: 32 32 32 32 32 32 32 32 12 12 12 12 12 12 11 10
# cd ~/telco-performance/Performance-settings/rt-low-latency-tools && \
../Performance\ scripts/performance-settings.sh && \
./release-scenario-SV-rtapp95utilIsolate-cyclictestIsolated.sh# Max Latencies: 00005 00009 00012 00006 00004 00005 00006 00004 00012 00012 00012 00008 00004 00013 00005 00011 00016 00010 00009 00009 00005 00005 00005 00006 00009 00009 00007 00010 00006 00005 00005 00004 00004 00004 00004 00003 00004 00014 00007 00005 00007 00007 00007 00006 00006 00007 00005 00004 00011 00005 00005 00006 00007 00004 00005 00006 00012 00007 00007 00008 00005 00009 00005 00006 00015 00015 00014 00006 00007 00012 00015 00008 00011 00012 00011 00015 00010 00004 00004 00005 00005 00008 00005 00013 00007 00017 00014 00008 00013 00013 00006 00006 00011 00004 00006 00006 00007 00017 00006 00005 00004 00011 00004 00007 00011 00018 00004 00009 00005 00008 00005 00006 00007 00007 00007 00007 00004 00008 00004 00007 # Max Latencies: 00005 00010 00004 00006 00010 00011 00005 00005 00005 00005 00006 00012 00019 00007 00014 00006 00007 00007 00005 00004 00010 00006 00017 00007 00006 00005 00005 00004 00006 00005 00007 00004 00005 00005 00005 00004 00005 00004 00004 00004 00005 00006 00004 00004 00004 00005 00004 00016 00006 00005 00006 00004 00009 00005 00011 00006 00018 00018 00018 00018 00010 00009 00014 00012 00005 00004 00004 00008 00004 00013 00004 00005 00006 00006 00006 00005 00011 00011 00005 00004 00014 00014 00014 00012 00019 00006 00011 00006 00014 00014 00014 00013 00014 00018 00011 00009 00006 00005 00006 00007 00005 00004 00005 00006 00007 00007 00007 00005 00013 00006 00006 00012 00009 00013 00017 00006 00012 00006 00014 00005
7.7 Appendix - BIOS settings #
{
"SystemConfiguration": {
"Comments": [
{
"Comment": "Export type is Normal,JSON,Selective"
},
{
"Comment": "Exported configuration may contain commented attributes. Attributes may be commented due to dependency, destructive nature, preserving server identity or for security reasons."
}
],
"Model": "PowerEdge R7725",
"ServiceTag": "56CCZ84",
"TimeStamp": "Tue Jun 9 15:54:09 2026",
"Components": [
{
"FQDD": "BIOS.Setup.1-1",
"Attributes": [
{
"Name": "WorkloadProfile",
"Value": "NotConfigured",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "LogicalProc",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "ProcVirtualization",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IommuSupport",
"Value": "Enabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PrebootDmaProtection",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "KernelDmaProtection",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "L1StreamHwPrefetcher",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "L2StreamHwPrefetcher",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "L1StridePrefetcher",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "L1RegionPrefetcher",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "L2UpDownPrefetcher",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NumaNodesPerSocket",
"Value": "4",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "CcxAsNumaDomain",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "Sme",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "PciMultiSegmentSupport",
"Value": "TwoSegments",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "AmdSpeculativeStoreMode",
"Value": "Auto",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "CpuFeatureErms",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "CpuFeatureFsrm",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "CpuFeatureRmss",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "CpuAcpiCstC2Latency",
"Value": "800",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "AmdCpuAvx512",
"Value": "Auto",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "TdpControl",
"Value": "Auto",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "ProcConfigTdpManual",
"Value": "400",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PptControl",
"Value": "Auto",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "ProcConfigPptManual",
"Value": "400",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "ProcX2Apic",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "ProcCcds",
"Value": "All",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "CcdCores",
"Value": "All",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "ControlledTurbo",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "ControlledTurboMinusBin",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeMode",
"Value": "NonRaid",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "BiosNvmeDriver",
"Value": "DellQualifiedDrives",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "BootSeqRetry",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "GenericUsbBoot",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "HddPlaceholder",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SysPrepClean",
"Value": "None",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderEn",
"Value": "Disk.Bay.16:Enclosure.Internal.0-3,RAID.Slot.7-2,NIC.PxeDevice.1-1",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderEn2",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderDis",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderDis2",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd1",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd2",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd3",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd4",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd5",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd6",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd7",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd8",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd9",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd10",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd11",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd12",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd13",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd14",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd15",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SetBootOrderFqdd16",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NumberOfPxeDevices",
"Value": "4",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "PxeDev1EnDis",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "PxeDev2EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "PxeDev3EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "PxeDev4EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiInitiatorName",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofEnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofHostId",
"Value": "4C4C4544-0036-4310-8043-B5C04F5A3834",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeofHostSecurityPath",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev1Interface",
"Value": "NIC.Slot.10-1-1",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "PxeDev1Protocol",
"Value": "IPv4",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "PxeDev1VlanEnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "PxeDev1VlanId",
"Value": "1",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "PxeDev1VlanPriority",
"Value": "0",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "PxeDev2Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev2Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev2VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev2VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev2VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev3Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev3Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev3VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev3VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev3VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev4Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev4Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev4VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev4VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev4VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev5Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev5Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev5VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev5VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev5VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev6Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev6Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev6VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev6VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev6VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev7Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev7Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev7VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev7VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev7VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev8Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev8Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev8VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev8VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev8VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev9Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev9Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev9VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev9VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev9VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev10Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev10Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev10VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev10VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev10VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev11Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev11Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev11VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev11VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev11VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev12Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev12Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev12VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev12VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev12VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev13Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev13Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev13VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev13VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev13VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev14Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev14Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev14VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev14VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev14VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev15Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev15Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev15VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev15VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev15VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev16Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev16Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev16VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev16VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PxeDev16VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1DhcpEnDis",
"Value": "Enabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1Ip",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1Mask",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1Gateway",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1DnsDhcpEnDis",
"Value": "Enabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1Dns1",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1Dns2",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1Uri",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev1TlsMode",
"Value": "OneWay",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2DhcpEnDis",
"Value": "Enabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2Ip",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2Mask",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2Gateway",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2DnsDhcpEnDis",
"Value": "Enabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2Dns1",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2Dns2",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2Uri",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev2TlsMode",
"Value": "OneWay",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3DhcpEnDis",
"Value": "Enabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3Ip",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3Mask",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3Gateway",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3DnsDhcpEnDis",
"Value": "Enabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3Dns1",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3Dns2",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3Uri",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev3TlsMode",
"Value": "OneWay",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4Protocol",
"Value": "IPv4",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4VlanEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4DhcpEnDis",
"Value": "Enabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4Ip",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4Mask",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4Gateway",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4DnsDhcpEnDis",
"Value": "Enabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4Dns1",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4Dns2",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4Uri",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HttpDev4TlsMode",
"Value": "OneWay",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1ConOrder",
"Value": "Con1Con2",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1Protocol",
"Value": "IPv4",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1VlanEnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1Retry",
"Value": "3",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1Timeout",
"Value": "10000",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1DhcpEnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1Ip",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1Mask",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1Gateway",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1TgtDhcpEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1TargetName",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1TargetIp",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1Port",
"Value": "3260",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1Lun",
"Value": "0",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1IsId",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1Auth",
"Value": "None",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1ChapType",
"Value": "OneWay",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1ChapName",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "OldIscsiDev1Con1ChapSecret",
"Value": "******",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NewIscsiDev1Con1ChapSecret",
"Value": "******",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con1RevChapName",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "OldIscsiDev1Con1RevChapSecret",
"Value": "******",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NewIscsiDev1Con1RevChapSecret",
"Value": "******",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2Interface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2Protocol",
"Value": "IPv4",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2VlanEnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2Retry",
"Value": "3",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2Timeout",
"Value": "10000",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2DhcpEnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2Ip",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2Mask",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2Gateway",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2TgtDhcpEnDis",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2TargetName",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2TargetIp",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2Port",
"Value": "3260",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2Lun",
"Value": "0",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2IsId",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2Auth",
"Value": "None",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2ChapType",
"Value": "OneWay",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2ChapName",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "OldIscsiDev1Con2ChapSecret",
"Value": "******",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NewIscsiDev1Con2ChapSecret",
"Value": "******",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "IscsiDev1Con2RevChapName",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "OldIscsiDev1Con2RevChapSecret",
"Value": "******",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NewIscsiDev1Con2RevChapSecret",
"Value": "******",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4EnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1ConInterface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1TransType",
"Value": "TCP",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1ConProtocol",
"Value": "IPv4",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1VlanEnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1Retry",
"Value": "3",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1Timeout",
"Value": "10000",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1HostDhcp",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1HostIP",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1HostMask",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1HostGateway",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1InfoDhcp",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1Nqn",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1Address",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1Port",
"Value": "4420",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1NameSpaceId",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1ControllerId",
"Value": "0",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1Security",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1Auth",
"Value": "None",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys1SecurityKeyPath",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2ConInterface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2TransType",
"Value": "TCP",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2ConProtocol",
"Value": "IPv4",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2VlanEnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2Retry",
"Value": "3",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2Timeout",
"Value": "10000",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2HostDhcp",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2HostIP",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2HostMask",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2HostGateway",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2InfoDhcp",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2Nqn",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2Address",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2Port",
"Value": "4420",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2NameSpaceId",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2ControllerId",
"Value": "0",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2Security",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2Auth",
"Value": "None",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys2SecurityKeyPath",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3ConInterface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3TransType",
"Value": "TCP",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3ConProtocol",
"Value": "IPv4",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3VlanEnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3Retry",
"Value": "3",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3Timeout",
"Value": "10000",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3HostDhcp",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3HostIP",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3HostMask",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3HostGateway",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3InfoDhcp",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3Nqn",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3Address",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3Port",
"Value": "4420",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3NameSpaceId",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3ControllerId",
"Value": "0",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3Security",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3Auth",
"Value": "None",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys3SecurityKeyPath",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4ConInterface",
"Value": "NIC.Slot.4-1-1",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4TransType",
"Value": "TCP",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4ConProtocol",
"Value": "IPv4",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4VlanEnDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4VlanId",
"Value": "1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4VlanPriority",
"Value": "0",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4Retry",
"Value": "3",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4Timeout",
"Value": "10000",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4HostDhcp",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4HostIP",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4HostMask",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4HostGateway",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4InfoDhcp",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4Nqn",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4Address",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4Port",
"Value": "4420",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4NameSpaceId",
"Value": "",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4ControllerId",
"Value": "0",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4Security",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4Auth",
"Value": "None",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "NvmeofSubsys4SecurityKeyPath",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "UsbPorts",
"Value": "AllOn",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "InternalUsb",
"Value": "On",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "UsbManagedPort",
"Value": "On",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "EmbVideo",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SriovGlobalEnable",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "OsWatchdogTimer",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DellAutoDiscovery",
"Value": "PlatformDefault",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "Slot2Bif",
"Value": "x16",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "Slot3Bif",
"Value": "x16",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "Slot7Bif",
"Value": "x16",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "Slot9Bif",
"Value": "x16",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "Slot2",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "Slot3",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "Slot4",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "Slot7",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "Slot9",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "Slot10",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SerialComm",
"Value": "Off",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SerialPortAddress",
"Value": "Com1",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "FailSafeBaud",
"Value": "115200",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "ConTermType",
"Value": "Vt100Vt220",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SysProfile",
"Value": "Custom",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "ProcPwrPerf",
"Value": "MaxPerf",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "MemFrequency",
"Value": "MaxPerf",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "ProcTurboMode",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "ProcCStates",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "MemPatrolScrub",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "MemRefreshRate",
"Value": "1x",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "PcieAspmL1",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "PeriodicDirectoryRinseTuning",
"Value": "Auto",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DeterminismControl",
"Value": "Manual",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DeterminismSlider",
"Value": "PerfDeterminism",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "OptimizerMode",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PowerProfileSelect",
"Value": "HighPerformanceMode",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "EqBypassToHighestRate",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "AmdCmnXgmiPstateControl",
"Value": "Manual",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "AmdCmnXgmiPstateSelection",
"Value": "High",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DfPstateFreqOptimizer",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DfCState",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "AmdThrottlerMode",
"Value": "Auto",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "Hsmp",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "AmdGnbSmuGmiFolding",
"Value": "Auto",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "BoostFMax",
"Value": "Auto",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "ApbDis",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "AmdGnbSmuCppc",
"Value": "Auto",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "AdaptiveAllocation",
"Value": "Auto",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "Sdci",
"Value": "Auto",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "AmdMaxXgmiSpeed",
"Value": "32GB",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DynamicLinkWidthManagement",
"Value": "Unforced",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "StrongPassword",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "StrongPasswordMinLength",
"Value": "8",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "OldSysPassword",
"Value": "******",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NewSysPassword",
"Value": "******",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "OldSetupPassword",
"Value": "******",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NewSetupPassword",
"Value": "******",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PasswordStatus",
"Value": "Unlocked",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "TpmSecurity",
"Value": "On",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "Tpm2Hierarchy",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DrtmSkinit",
"Value": "Off",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "PwrButton",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "UefiVariableAccess",
"Value": "Standard",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SecureBoot",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SecureBootPolicy",
"Value": "Standard",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "SecureBootMode",
"Value": "DeployedMode",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "TpmPpiBypassProvision",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "TpmPpiBypassClear",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "Tpm2Algorithm",
"Value": "SHA256",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "RedundantOsLocation",
"Value": "None",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "RedundantOsState",
"Value": "Visible",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "RedundantOsBoot",
"Value": "Disabled",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "MemTest",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DramRefreshDelay",
"Value": "Minimum",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "CorrEccSmi",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "PPROnUCE",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "CECriticalSEL",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot00",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot01",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot02",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot03",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot04",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot05",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot06",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot07",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot08",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot09",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot10",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot11",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot12",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot13",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot14",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot15",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot16",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot17",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot18",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot19",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot20",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot21",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot22",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DimmSlot23",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "CXLMemoryMode",
"Value": "Homogeneous",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "TimeZone",
"Value": "UTCP0100",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "Daylight",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "AssetTag",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "NumLock",
"Value": "On",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "ErrPrompt",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "DellWyseP25BIOSAccess",
"Value": "Enabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "AcpiFpdt",
"Value": "Disabled",
"Set On Import": "True",
"Comment": "Read and Write"
},
{
"Name": "UefiBootSeq",
"Value": "Disk.Bay.16:Enclosure.Internal.0-3, Unknown.Unknown.2-1, RAID.Slot.7-2, NIC.PxeDevice.1-1",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "HddSeq",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "OneTimeBiosBootSeq",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "OneTimeUefiBootSeq",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
},
{
"Name": "OneTimeHddSeq",
"Value": "",
"Set On Import": "False",
"Comment": "Read and Write"
}
]
}
]
}
}8 Legal notice #
Copyright © 2006–2026 SUSE LLC and contributors. All rights reserved.
Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or (at your option) version 1.3; with the Invariant Section being this copyright notice and license. A copy of the license version 1.2 is included in the section entitled "GNU Free Documentation License".
SUSE, the SUSE logo and YaST are registered trademarks of SUSE LLC in the United States and other countries. For SUSE trademarks, see https://www.suse.com/company/legal/.
Linux is a registered trademark of Linus Torvalds. All other names or trademarks mentioned in this document may be trademarks or registered trademarks of their respective owners.
Documents published as part of the series SUSE Technical Reference Documentation have been contributed voluntarily by SUSE employees and third parties. They are meant to serve as examples of how particular actions can be performed. They have been compiled with utmost attention to detail. However, this does not guarantee complete accuracy. SUSE cannot verify that actions described in these documents do what is claimed or whether actions described have unintended consequences. SUSE LLC, its affiliates, the authors, and the translators may not be held liable for possible errors or the consequences thereof.
9 GNU Free Documentation License #
Copyright © 2000, 2001, 2002 Free Software Foundation, Inc. 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed.
0. PREAMBLE#
The purpose of this License is to make a manual, textbook, or other functional and useful document "free" in the sense of freedom: to assure everyone the effective freedom to copy and redistribute it, with or without modifying it, either commercially or noncommercially. Secondarily, this License preserves for the author and publisher a way to get credit for their work, while not being considered responsible for modifications made by others.
This License is a kind of "copyleft", which means that derivative works of the document must themselves be free in the same sense. It complements the GNU General Public License, which is a copyleft license designed for free software.
We have designed this License in order to use it for manuals for free software, because free software needs free documentation: a free program should come with manuals providing the same freedoms that the software does. But this License is not limited to software manuals; it can be used for any textual work, regardless of subject matter or whether it is published as a printed book. We recommend this License principally for works whose purpose is instruction or reference.
1. APPLICABILITY AND DEFINITIONS#
This License applies to any manual or other work, in any medium, that contains a notice placed by the copyright holder saying it can be distributed under the terms of this License. Such a notice grants a world-wide, royalty-free license, unlimited in duration, to use that work under the conditions stated herein. The "Document", below, refers to any such manual or work. Any member of the public is a licensee, and is addressed as "you". You accept the license if you copy, modify or distribute the work in a way requiring permission under copyright law.
A "Modified Version" of the Document means any work containing the Document or a portion of it, either copied verbatim, or with modifications and/or translated into another language.
A "Secondary Section" is a named appendix or a front-matter section of the Document that deals exclusively with the relationship of the publishers or authors of the Document to the Document’s overall subject (or to related matters) and contains nothing that could fall directly within that overall subject. (Thus, if the Document is in part a textbook of mathematics, a Secondary Section may not explain any mathematics.) The relationship could be a matter of historical connection with the subject or with related matters, or of legal, commercial, philosophical, ethical or political position regarding them.
The "Invariant Sections" are certain Secondary Sections whose titles are designated, as being those of Invariant Sections, in the notice that says that the Document is released under this License. If a section does not fit the above definition of Secondary then it is not allowed to be designated as Invariant. The Document may contain zero Invariant Sections. If the Document does not identify any Invariant Sections then there are none.
The "Cover Texts" are certain short passages of text that are listed, as Front-Cover Texts or Back-Cover Texts, in the notice that says that the Document is released under this License. A Front-Cover Text may be at most 5 words, and a Back-Cover Text may be at most 25 words.
A "Transparent" copy of the Document means a machine-readable copy, represented in a format whose specification is available to the general public, that is suitable for revising the document straightforwardly with generic text editors or (for images composed of pixels) generic paint programs or (for drawings) some widely available drawing editor, and that is suitable for input to text formatters or for automatic translation to a variety of formats suitable for input to text formatters. A copy made in an otherwise Transparent file format whose markup, or absence of markup, has been arranged to thwart or discourage subsequent modification by readers is not Transparent. An image format is not Transparent if used for any substantial amount of text. A copy that is not "Transparent" is called "Opaque".
Examples of suitable formats for Transparent copies include plain ASCII without markup, Texinfo input format, LaTeX input format, SGML or XML using a publicly available DTD, and standard-conforming simple HTML, PostScript or PDF designed for human modification. Examples of transparent image formats include PNG, XCF and JPG. Opaque formats include proprietary formats that can be read and edited only by proprietary word processors, SGML or XML for which the DTD and/or processing tools are not generally available, and the machine-generated HTML, PostScript or PDF produced by some word processors for output purposes only.
The "Title Page" means, for a printed book, the title page itself, plus such following pages as are needed to hold, legibly, the material this License requires to appear in the title page. For works in formats which do not have any title page as such, "Title Page" means the text near the most prominent appearance of the work’s title, preceding the beginning of the body of the text.
A section "Entitled XYZ" means a named subunit of the Document whose title either is precisely XYZ or contains XYZ in parentheses following text that translates XYZ in another language. (Here XYZ stands for a specific section name mentioned below, such as "Acknowledgements", "Dedications", "Endorsements", or "History".) To "Preserve the Title" of such a section when you modify the Document means that it remains a section "Entitled XYZ" according to this definition.
The Document may include Warranty Disclaimers next to the notice which states that this License applies to the Document. These Warranty Disclaimers are considered to be included by reference in this License, but only as regards disclaiming warranties: any other implication that these Warranty Disclaimers may have is void and has no effect on the meaning of this License.
2. VERBATIM COPYING#
You may copy and distribute the Document in any medium, either commercially or noncommercially, provided that this License, the copyright notices, and the license notice saying this License applies to the Document are reproduced in all copies, and that you add no other conditions whatsoever to those of this License. You may not use technical measures to obstruct or control the reading or further copying of the copies you make or distribute. However, you may accept compensation in exchange for copies. If you distribute a large enough number of copies you must also follow the conditions in section 3.
You may also lend copies, under the same conditions stated above, and you may publicly display copies.
3. COPYING IN QUANTITY#
If you publish printed copies (or copies in media that commonly have printed covers) of the Document, numbering more than 100, and the Document’s license notice requires Cover Texts, you must enclose the copies in covers that carry, clearly and legibly, all these Cover Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on the back cover. Both covers must also clearly and legibly identify you as the publisher of these copies. The front cover must present the full title with all words of the title equally prominent and visible. You may add other material on the covers in addition. Copying with changes limited to the covers, as long as they preserve the title of the Document and satisfy these conditions, can be treated as verbatim copying in other respects.
If the required texts for either cover are too voluminous to fit legibly, you should put the first ones listed (as many as fit reasonably) on the actual cover, and continue the rest onto adjacent pages.
If you publish or distribute Opaque copies of the Document numbering more than 100, you must either include a machine-readable Transparent copy along with each Opaque copy, or state in or with each Opaque copy a computer-network location from which the general network-using public has access to download using public-standard network protocols a complete Transparent copy of the Document, free of added material. If you use the latter option, you must take reasonably prudent steps, when you begin distribution of Opaque copies in quantity, to ensure that this Transparent copy will remain thus accessible at the stated location until at least one year after the last time you distribute an Opaque copy (directly or through your agents or retailers) of that edition to the public.
It is requested, but not required, that you contact the authors of the Document well before redistributing any large number of copies, to give them a chance to provide you with an updated version of the Document.
4. MODIFICATIONS#
You may copy and distribute a Modified Version of the Document under the conditions of sections 2 and 3 above, provided that you release the Modified Version under precisely this License, with the Modified Version filling the role of the Document, thus licensing distribution and modification of the Modified Version to whoever possesses a copy of it. In addition, you must do these things in the Modified Version:
Use in the Title Page (and on the covers, if any) a title distinct from that of the Document, and from those of previous versions (which should, if there were any, be listed in the History section of the Document). You may use the same title as a previous version if the original publisher of that version gives permission.
List on the Title Page, as authors, one or more persons or entities responsible for authorship of the modifications in the Modified Version, together with at least five of the principal authors of the Document (all of its principal authors, if it has fewer than five), unless they release you from this requirement.
State on the Title page the name of the publisher of the Modified Version, as the publisher.
Preserve all the copyright notices of the Document.
Add an appropriate copyright notice for your modifications adjacent to the other copyright notices.
Include, immediately after the copyright notices, a license notice giving the public permission to use the Modified Version under the terms of this License, in the form shown in the Addendum below.
Preserve in that license notice the full lists of Invariant Sections and required Cover Texts given in the Document’s license notice.
Include an unaltered copy of this License.
Preserve the section Entitled "History", Preserve its Title, and add to it an item stating at least the title, year, new authors, and publisher of the Modified Version as given on the Title Page. If there is no section Entitled "History" in the Document, create one stating the title, year, authors, and publisher of the Document as given on its Title Page, then add an item describing the Modified Version as stated in the previous sentence.
Preserve the network location, if any, given in the Document for public access to a Transparent copy of the Document, and likewise the network locations given in the Document for previous versions it was based on. These may be placed in the "History" section. You may omit a network location for a work that was published at least four years before the Document itself, or if the original publisher of the version it refers to gives permission.
For any section Entitled "Acknowledgements" or "Dedications", Preserve the Title of the section, and preserve in the section all the substance and tone of each of the contributor acknowledgements and/or dedications given therein.
Preserve all the Invariant Sections of the Document, unaltered in their text and in their titles. Section numbers or the equivalent are not considered part of the section titles.
Delete any section Entitled "Endorsements". Such a section may not be included in the Modified Version.
Do not retitle any existing section to be Entitled "Endorsements" or to conflict in title with any Invariant Section.
Preserve any Warranty Disclaimers.
If the Modified Version includes new front-matter sections or appendices that qualify as Secondary Sections and contain no material copied from the Document, you may at your option designate some or all of these sections as invariant. To do this, add their titles to the list of Invariant Sections in the Modified Version’s license notice. These titles must be distinct from any other section titles.
You may add a section Entitled "Endorsements", provided it contains nothing but endorsements of your Modified Version by various parties—for example, statements of peer review or that the text has been approved by an organization as the authoritative definition of a standard.
You may add a passage of up to five words as a Front-Cover Text, and a passage of up to 25 words as a Back-Cover Text, to the end of the list of Cover Texts in the Modified Version. Only one passage of Front-Cover Text and one of Back-Cover Text may be added by (or through arrangements made by) any one entity. If the Document already includes a cover text for the same cover, previously added by you or by arrangement made by the same entity you are acting on behalf of, you may not add another; but you may replace the old one, on explicit permission from the previous publisher that added the old one.
The author(s) and publisher(s) of the Document do not by this License give permission to use their names for publicity for or to assert or imply endorsement of any Modified Version.
5. COMBINING DOCUMENTS#
You may combine the Document with other documents released under this License, under the terms defined in section 4 above for modified versions, provided that you include in the combination all of the Invariant Sections of all of the original documents, unmodified, and list them all as Invariant Sections of your combined work in its license notice, and that you preserve all their Warranty Disclaimers.
The combined work need only contain one copy of this License, and multiple identical Invariant Sections may be replaced with a single copy. If there are multiple Invariant Sections with the same name but different contents, make the title of each such section unique by adding at the end of it, in parentheses, the name of the original author or publisher of that section if known, or else a unique number. Make the same adjustment to the section titles in the list of Invariant Sections in the license notice of the combined work.
In the combination, you must combine any sections Entitled "History" in the various original documents, forming one section Entitled "History"; likewise combine any sections Entitled "Acknowledgements", and any sections Entitled "Dedications". You must delete all sections Entitled "Endorsements".
6. COLLECTIONS OF DOCUMENTS#
You may make a collection consisting of the Document and other documents released under this License, and replace the individual copies of this License in the various documents with a single copy that is included in the collection, provided that you follow the rules of this License for verbatim copying of each of the documents in all other respects.
You may extract a single document from such a collection, and distribute it individually under this License, provided you insert a copy of this License into the extracted document, and follow this License in all other respects regarding verbatim copying of that document.
7. AGGREGATION WITH INDEPENDENT WORKS#
A compilation of the Document or its derivatives with other separate and independent documents or works, in or on a volume of a storage or distribution medium, is called an "aggregate" if the copyright resulting from the compilation is not used to limit the legal rights of the compilation’s users beyond what the individual works permit. When the Document is included in an aggregate, this License does not apply to the other works in the aggregate which are not themselves derivative works of the Document.
If the Cover Text requirement of section 3 is applicable to these copies of the Document, then if the Document is less than one half of the entire aggregate, the Document’s Cover Texts may be placed on covers that bracket the Document within the aggregate, or the electronic equivalent of covers if the Document is in electronic form. Otherwise they must appear on printed covers that bracket the whole aggregate.
8. TRANSLATION#
Translation is considered a kind of modification, so you may distribute translations of the Document under the terms of section 4. Replacing Invariant Sections with translations requires special permission from their copyright holders, but you may include translations of some or all Invariant Sections in addition to the original versions of these Invariant Sections. You may include a translation of this License, and all the license notices in the Document, and any Warranty Disclaimers, provided that you also include the original English version of this License and the original versions of those notices and disclaimers. In case of a disagreement between the translation and the original version of this License or a notice or disclaimer, the original version will prevail.
If a section in the Document is Entitled "Acknowledgements", "Dedications", or "History", the requirement (section 4) to Preserve its Title (section 1) will typically require changing the actual title.
9. TERMINATION#
You may not copy, modify, sublicense, or distribute the Document except as expressly provided for under this License. Any other attempt to copy, modify, sublicense or distribute the Document is void, and will automatically terminate your rights under this License. However, parties who have received copies, or rights, from you under this License will not have their licenses terminated so long as such parties remain in full compliance.
10. FUTURE REVISIONS OF THIS LICENSE#
The Free Software Foundation may publish new, revised versions of the GNU Free Documentation License from time to time. Such new versions will be similar in spirit to the present version, but may differ in detail to address new problems or concerns. See http://www.gnu.org/copyleft/.
Each version of the License is given a distinguishing version number. If the Document specifies that a particular numbered version of this License "or any later version" applies to it, you have the option of following the terms and conditions either of that specified version or of any later version that has been published (not as a draft) by the Free Software Foundation. If the Document does not specify a version number of this License, you may choose any version ever published (not as a draft) by the Free Software Foundation.
ADDENDUM: How to use this License for your documents#
Copyright (c) YEAR YOUR NAME. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the section entitled “GNU Free Documentation License”.
If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts, replace the “ with…Texts.” line with this:
with the Invariant Sections being LIST THEIR TITLES, with the Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST.
If you have Invariant Sections without Cover Texts, or some other combination of the three, merge those two alternatives to suit the situation.
If your document contains nontrivial examples of program code, we recommend releasing these examples in parallel under your choice of free software license, such as the GNU General Public License, to permit their use in free software.